@techreport{CACTI51,
   Author = {Shyamkumar Thoziyoor and Naveen Muralimanohar and Jung-Ho Ahn and Norman P. Jouppi},
   Title = {{CACTI 5.1 technical report}},
   Institution = {{HP Labs}},
   Year = {2008},
   Number = {HPL-2008-20}
}

@inproceedings{CACTI-D,
   Author = {Thoziyoor, S. and Ahn, J.-H. and Monchiero, M. and Brockman, J. B. and Jouppi, N. P.},
   Title = {{A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies}},
   BookTitle = {Proceedings of the International Symposium on Computer Architecture},
   Pages = {51--62},
   Year = {2008}
}

@techreport{eCACTI,
   Author = {M. Mamidipaka and N. Dutt},
   Title = {{eCACTI: An enhanced power estimation model for on-chip caches}},
   Institution = {{Center for Embedded Computer Systems}},
   Year = {2004},
   Number = {TR04-28}
}

@article{CACTI60,
   Author = {Naveen Muralimanohar and Rajeev Balasubramonian and Norman P. Jouppi},
   Title = {{Architecting efficient interconnects for large caches with CACTI 6.0}},
   Journal = {IEEE Micro},
   Volume = {28},
   Number = {1},
   Year = {2008},
   Pages = {69--79}
}

@article{CACTI10,
   Author = {Steven J. E. Wilton and Norm P. Jouppi},
   Title = {{CACTI: An enhanced cache access and cycle time model}},
   Journal = {IEEE Journal of Solid-State Circuits},
   Year = {1996},
   Volume = {31},
   Pages = {677--688}
}

@article{CACTI:JSSC95:Evans,
   Author = {Evans, R. J. and Franzon, P. D.},
   Title = {{Energy consumption modeling and optimization for SRAM's}},
   Journal = {IEEE Journal of Solid-State Circuits},
   Volume = {30},
   Number = {5},
   Pages = {571--579},
   Year = {1995}
}

@inproceedings{CACTI:PCRAMsim,
   Author = {Dong, Xiangyu and Jouppi, Norman P. and Xie, Yuan},
   Title = {{PCRAMsim: System-level performance, energy, and area modeling for phase-change RAM}},
   Booktitle = {Proceedings of the International Conference on Computer-Aided Design},
   Year = {2009},
   Pages = {269--275}
}


@inproceedings{CACTI:GLSVLSI08:Mangalagiri,
   Author = {Mangalagiri, Prasanth and Sarpatwari, Karthik and Yanamandra, Aditya and Narayanan, VijayKrishnan and Xie, Yuan and others},
   Title = {{A low-power phase change memory based hybrid cache architecture}},
   Booktitle = {Proceedings of the Great Lakes Symposium on VLSI},
   Pages = {395-3-98},
   Year = {2008}
}


@inproceedings{CACTI:DAC08:Dong,
   Author = {Dong, Xiangyu and Wu, Xiaoxia and Sun, Guangyu and Xie, Yuan and Li, H. and others},
   Title = {{Circuit and Microarchitecture Evaluation of 3D Stacking Magnetic RAM (MRAM) as a Universal Memory Replacement}},
   Booktitle = {Proceedings of the Design Automation Conference},
   Pages = {554--559},
   Year = {2008}
}

@inproceedings{CACTI:DATE10:Mohan,
   Author = {Vidyabhushan Mohan and Sudhanva Gurumurthi and Mircea R. Stan},
   Title = {{FlashPower: A detailed power model for NAND flash memory}},
   Booktitle = {DATE},
   Year = {2010},
   Pages = {502--507}
}
